GTS leading the way to process-aware layout-based structure emulation for DTCO

Within our wide range of research projects, we started a new venture in cooperation with TU Wien scientists. The project goal is to establish process-aware layout-based structure emulation for DTCO until end of 2022.

The recently launched PASTE-DTCO (Process-Aware Structure Emulation for Device-Technology Co-Optimization) is a basic research project aimed at investigating strategies for structure generation of More-Moore Devices. The studied approaches range from fast hierarchical process simulation and emulation using advanced techniques to the application of a new field of research in the development of process compact models. These models can be used to efficiently create a process-aware structure geometry without the need for the device designer to have expert knowledge of the fabrication steps being applied.

The results of the project will be prototypes as part of GTS Framework. Aims of the project include the realization of a hierarchical process emulator, employed to study the process variability of novel device structures within the framework. Furthermore, compact process models to efficiently describe the link between physical parameters and resulting geometrical non-idealities will be developed and used as a proof-of-concept for process-aware layout-based structure generation within GTS Framework. The overarching goal is to create a flexible DTCO flow incorporating process information in an efficient yet accurate manner.

The project is supported by the BRIDGE program of the Austria Research Promotion Agency (FFG), a funding scheme promoting knowledge transfer between universities and small- and medium-sized enterprises.