A Key Technology to a Visual World

The dominant part of information transmitted to the human brain is visual. No wonder that images (either still or moving) are so important to society – with image capturing devices being used in business, research, and leisure.

Active-Pixel Sensors (APS), CMOS

The prevailing technology to capture digital images are Active-Pixel Sensors (APS), especially CMOS Image Sensors (CIS) combined with Photo Diodes (PD). Good integration with existing CMOS processes, speed, low power consumtion, as well as versatile and compact structures are main advantages of CIS, when compared to the previously used Charge-Coupled Device (CCD) technology.

At the end, the requirements of the application need to be met. Tools need to be capable to study details in the device structure as well as properties and performance of the whole circuit.

Targeted and efficient R&D needs to rely on dependable insights on the device. Physically-sound simulation models are needed to ensure valid data, especially when considering changes in key parameters or adapting technologies. GTS Minimos-NT is the perfect tool to analyze and optimize – from transistor level up to cell / circuit level.

3D Structure of a CIS Cell

Structure: Full 3D 4T PPD CIS
4T PPD CIS structure

One common type of APS cell consists of a Pinned Photodiode (PPD) with four NMOS transistors. Such structure can be Backside Illuminated (BSI) or use a transfer gate (TG) transistor with vertical channel for more compact pixels. This produces a 3D cell structure, with:

  1. A pinned photodiode (PPD),
  2. adjacent Transfer Gate (TG) transistor and Floating Diffusion (FD) region,
  3. a readout circuit, usually consisting of
    • Source Follower Attenuator (SFA)
    • Reset (RST)
    • Row Select (RS) transistors

GTS Framework has excellent tools to study such devices, like below.

Analysing a 4T PPD CMOS Image Sensor

Workflow for analyzing a CMOS image sensor from transistor-level to circuit-level

Structure Generation

Screenshot: Layout and structure generation in GTS Framework
Layout-based structure generation in GTS Framework

Device structures can easily be generated from layouts using Layout-based Structure Generation (LSG) and a technology file.

Photodiode, transfer gate, and FD region are closely technologically integrated, forming one device structure, while the readout circuit can be a separate structure – or it can be represented by compact transistor models.

Transient Response of Full Cycle

Minimos-NT can simulate the transient response of one such pixel, including a full cycle of:

  1. exposure (optical charge generation in the PPD),
  2. reset (potential of FD region),
  3. transfer (of charge through TG to FD region and charge-to-voltage conversion),
  4. readout (using SFA to transfer the state of the pixel to the column bus).

A useful figure-of-merit is the output voltage of the pixel cell at the end of the cycle.

To optimize the cell, usually the impact of optical generation, technological parameters and layout dimensions on the transient response and output voltage are investigated.

Full-Cell 3D TCAD or Mixed-Mode with BSIM Models

As required, one can choose to either run TCAD simulations of the full pixel cell, or include the readout circuit as compact models:

Full-Cell TCAD Simulation

Schematics: Full-cell TCAD CMOS Image Sensor (CIS)
CIS Schematics, full-cell TCAD simulation

In Minimos-NT, it is well feasible to run full-3D numerical device simulations (TCAD) of the full circuit, i.e. one pixel cell.

This option provides ultimate accuracy, and makes it easy to predict and optimize properties of the whole cell. It can account for any effects that occur anywhere in the circuit, e.g. in the readout transistors.

Mixed with Compact Models

Schematics: CMOS Image Sensor (CIS) using BSIM compact model of the readout circuit
CIS Schematics, Mixed-Mode simulation using BSIM transistors

When concentrating on the sensor, the option to use compact models (BSIM) for the rest of the circuit provides very fast results. Comparison to full-cell results is possible.

Optical Generation

The optical generation carrier current density (1/cm^2*s) can be chosen as a model parameter, and the SRH recombination model has to be enabled in the semiconductor substrate.


Transient pixel simulation can easily be configured to include self-heating. Based on the thermal dissipation of a single cycle, the temperature profile of the pixel cell under continuous operation (e.g. video recording) can be calculated.

Varying or Optimizing Device Parameters

To study the impact of variations, the easy-to-use DOE (Design of Experiment) workflow can efficiently vary arbitrary parameters, such as technological or layout parameters of the cell, as well as optical generation to study their impact on circuit behavior and response, e.g. output voltage.

Using the built-in Optimizer of GTS Framework, you can efficiently automate finding optimal parameter combinations for your application.

Transient simulation of CIS readout cycle
Transfer characteristic of readout circuit
CIS output voltage vs. optical generation
DoE; CIS output voltage for varying PD doping
DOE; CIS output voltage for varying oxide thickness of TG

Numerical Efficiency

The average run-time of such simulations with Minimos-NT on a recent well-equipped multi-core workstation is typically less than an hour.

Comprehensive Analysis of CMOS Image Sensors

Versatility and solid foundation in physics prove GTS Framework ideal for analysis and optimization of semiconductor image sensors. The rich and extendable material database as well as the easy-to-use yet powerful DoE interface provide a big advantage over traditional solutions.

Depending on desired accuracy and availability of process/calibration data, Minimos-NT allows full-cell TCAD simulations as well as mixed-mode simulations with compact transistor models.

Data processing scripts and the Python API allow for customization of the simulation flow for particular applications and needs.



GTS Minimos NT – simulate semiconductor devices and circuits: Run steady-state, transient, and small-signal analysis of arbitrary 2D and 3D device geometries. Combine multiple devices in a circuit with compact models. Run thermal analysys of devices and circuits.