Icon: TutorialTutorials provide step-by-step instructions on how to use GTS Framework in general or for specific appliations. To begin, we highly recommend going through the Getting Started tutorial – it shows how to get simulations running quickly and easily.

Icon: Application exampleApplication examples show the insights gained from using GTS Framework for a specific application. Next to the tutorials, these examples can be very handy to get familiar with GTS Framework, too, when used as templates. However, focus is more on the results rather than on specific UI interactions.

GTS project folderFor each tutorial and application example, GTS provides the full raw data (input files and simulation results) as a zipped GTS project file. Download the zip file, extract it to your local projects folder, and open it in GTS Framework. See the Getting Started tutorial for details.

Graduation caps indicating the sophistication level of the examples and tutorialsThe graduation caps indicate the sophistication level: 1 cap – introductory; 2 – intermediate; 3 – advanced.

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Creating LSG Technology Files - Tutorial

This tutorial demonstrates the step-by-step creation of a simple technology file.
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High-Voltage LDMOS - Tutorial

We study an LDMOS transistor using different models and simulation modes. The influence of geometric variations on the output characteristics is surveyed using GTS Structure device templates and the concept of ToolFolders. By applying impact-ionization and self-heating models, the device physics is further investigated. Finally, a transient simulation of the LDMOS switch-on behavior is performed.
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Ferroelectrics - Tutorial

This tutorial shows how to run device simulations with ferroelectric materials. We examine a capacitor with ferroelectric material, hysteresis by using the model evaluation mode, and a MOSFET with a gate stack using a ferroelectric material.
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Advanced Scripting - Tutorial

This tutorial demonstrates how to use a setup where the Optimizer tool calls the DOE tool to run a more complex optimization with multiple reference data files.
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Variability Simulation - Tutorial

Demonstrates calculation of the fluctuations in electrical characteristic due to random discrete dopants (RDD) and metal grain roughness (MGR).
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DOE, Optimizer, Post-Processing - Tutorial

This tutorial demonstrates the design-of-experiments (DOE) and parameter-fitting capabilities (optimizer) of GTS Framework. Further, it illustrates usage of the post-processing tool to show the influence of a device parameter on specific figures of merit of a MOSFET, such as Vth, ION, IOFF, and the sub-threshold slope.
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Schrödinger-Poisson Simulation - Tutorial

This tutorial demonstrates a basic work-flow for analyzing FinFET or nanowire cross-sections using VSP. Parameterized nanowire templates for rectangular as well as triangular and circular cross-sections are awailable in GTS Structure. A self-consistent solution of the effective mass closed boundary Schroedinger carrier model and the Poisson equation are calculated for (100) and (110) substrate orientation. The wavefunctions are exported to a text file.
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RDD with IFM - Tutorial

This tutorial demonstrates calculation of the fluctuations in electrical characteristics due to random discrete dopants (RDD) using the Impedance field method (IFM).
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Mixed-Mode Part II - Tutorial

This is a follow-up to the Mixed-Mode I tutorial. It shows the advanced mixed-mode simulation capabilities of Minimos-NT. First, we simulate the output characteristics of a simple CMOS inverter. Then, we extend this circuit to simulate the transient behaviour of a CMOS inverter chain and finally a whole SRAM cell.
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Mixed-Mode Part I - Tutorial

Basic mixed-mode simulation capabilities of Minimos-NT are presented. Distributed and compact devices are used to simulate the output voltage of a single transistor inverter and a CMOS inverter. As a follow-up, we recommend to continue with the Mixed-Mode II tutorial, covering transient analysis of a COMS inverter and an entire SRAM cell.
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kp and Low-Field Simulations - Tutorial

This tutorial demonstrates a typical work-flow for calculating the subband structure of a channel cross-section and the channel's mobility. In the first example, we will look at a nanowire, which represents a one-dimensional system of carriers. In the second example, we will recap using a MOS structure, which is a two-dimensional system.
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Irradiation Simulation - Tutorial

This tutorial illustrates simulation of a single-event response due to heavy ion strikes on device structures and circuits of increasing complexity. Starting with a simple 2D MOSFET example, the influence of the ion impact position is shown. Furthermore, investigations on circuit level are carried out including a 6T-SRAM cell SEU. Finally, the 3D irradiation simulation capabilities are demonstrated.
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Simulation Flow with DOE, Process and Device Splits - Getting Started II Tutorial

We use the Design of Experiment (DOE) workspace of GTS Framework. A workflow with structure generation, device simulation and parameter extraction is shown, including Off-current normalization.
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Projects, ToolFolders, Device Simulation - Getting Started I Tutorial

The general handling of GTS Framework is introduced by rather basic examples. The basic uses of GTS Structure and Minimos-NT are illustrated as well as the concept of ToolFolders and the related workflow functions. Recommended to get a first impression!
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External Generation Profile - Tutorial

Shows how to run a transient device simulation, taking into account an external carrier generation process.
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DOE Table from File - Tutorial

This tutorial demonstrates how to read the Design of Experiment table from a file. This allows you to customize the DOE manually or generate it by an external tool.
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Device Simulation - Tutorial

Steady-state Simulations; improve convergence performance by using results from one simulation to initialize next one. Quantum tunnelling through oxide, Gate currents for varying Drain voltages.
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Device Editor - Tutorial

This tutorial introduces the device editor integrated in GTS Framework. It illustrates editing device doping profiles as well as 2D and 3D device structures.
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Logic Cell Simulation with GTS Cell Designer - N7 Inverter Cell - Tutorial

This tutorial introduces the user into the work flow of GTS Cell Designer. It is a guide from layout and technology rule-based structure generation to transient device simulation to cell parameter extraction. The knowledge presented here can act as a basis for more complex design-technology co-optimization (DTCO) work flows.
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Introduction to Cell Designer - N7 Technology Simulation … Tutorial

This tutorial describes the basic work flow of GTS Cell Designer, from layout and technology rule-based structure generation to transient device simulation to cell parameter extraction. A good starting point for more complex work flows.
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DTCO Spice RO Nanosheets - Application Example

In this example, an efficient approach for DTCO is demonstrated which combines parasitics extraction (PEX), BSIM model card extraction, and SPICE simulations of ring oscillators in a nanosheet technology.
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DTCO Based on RC Analysis of Complementary FETs - Application Example

In this example, an efficient approach for DTCO of CFET technologies is demonstrated which combines FEOL transistor simulations and MEOL/BEOL paracitics extraction (PEX) of inverter cells.
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DTCO Based on Nanosheet Full Cell RO - Application Example

In this example, a computationally expensive but accurate DTCO flow is demonstrated which employs TCAD simulations of full ring oscillator cells in nanosheet technology.
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DTCO Based on CFET Full Cell RO - Application Example

In this example, a computationally expensive but accurate DTCO flow is demonstrated which employs TCAD simulations of full ring oscillator cells in CFET technology.
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DTCO Based on Full Cell RO - Application Example

A computationally expensive but accurate DTCO flow is demonstrated which employs TCAD simulations of full ring oscillator cells in FinFET technology.
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Image Sensor - Application Example

In this example, a 3D structure of 4T CMOS image sensor with variation of technology parameters is presented.
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Parasitics Extraction of an Inverter Cell - Application Example

Demonstrates the extraction of parasitic resistances and capacitances (PEX) on the example of an inverter cell in FinFET technology. Processing, visualization of data and extraction of netlists are shown.
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Band-Edge Stress - Application Example

This example demonstrates the effect of stress on band-edge and as a result, changes in C-V curves.
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Modeling of Interface Traps in Nano-scaled Devices - Application Example

Demonstrates the usage of the GTS Nano Device Simulator (NDS) to model a 3D nanowire FET with interface charges.
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iN14 FinFET Calibration - Application Example

Demonstrates the usage of GTS Nano Device Simulator (NDS) to predict the short channel performance of n/pFinFETs by using calibrated scattering parameters.
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VSP Double-Gate nMOS Capacitance - Application Example

Demonstrates the usage of GTS tools to setup an nDGMOS calculating the sub-band structure and charge density for different orientations and stresses.
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SOI FinFET Discrete Traps and Dopants - Application Example

Based on a FinFET structure, the influence of discrete interface and oxide traps as well as discrete dopants on the device characteristics are simulated in Minimos-NT.
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DTCO Spice RO - Application Example

In this example, an efficient approach for DTCO is demonstrated which combines parasitics extraction (PEX), BSIM model card extraction, and SPICE simulations of ring oscillators in FinFET technology.
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GaN HEMT - Application Example

Demonstrates the simulation of GaN devices on the example of a HEMT.
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VSP Planar nMOS Capacitance - Application Example

Demonstrates the usage of GTS tools to setup a Planar nMOSCAP calculating the sub-band structure and charge density for different orientations and stresses.
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VSP FinFET nMOS - Application Example

Demonstrates the usage of GTS tools to setup a FinFET nMOS calculating the sub-band structure and charge density for different orientations and stresses.
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Universal Mobility Curves - Application Example

Demonstrates the verification of VSP with the universal mobility curves for different doping concentrations and Si surface orientations.
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GTS Nano Device Simulator Gate-All-Around FinFET - Application Example

Demonstrates the usage of the GTS Nano Device Simulator (NDS) to model nMOS gate-all-around (GAA) FinFET transistors. Impact of gate lenght, channel orientation and mechanical stress is investigated.
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SOI FinFET - Application Example

Demonstrates a basic simulation flow on the basis of an SOI FinFET. Drift Diffusion and Density Gradient simulations of IV, CV curves and Gate leakage analysis have been performed.
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GTS Nano Device Simulator Bulk FinFET - Application Example

Demonstrates the usage of the GTS Nano Device Simulator (NDS) to model n-type and p-type bulk FinFETs. Different methods of solving the Boltzmann transport equation (BTE) and several ways to reduce the computational effort without loss of physical accuracy are used.
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VSP … Effect of Interface Traps on Mobility - Application Example

Demonstrates the usage of VSP to calculate the effect of charged interface traps on the mobility of an nMOSCap and an nFinFET for a range of interface trap densities.
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DTCO Based on RC Analysis - Application Example

In this example, an efficient approach for DTCO of FinFET technology is demonstrated which combines FEOL transistor simulations and BEOL parasitics extraction (PEX) of inverter cells.
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VSP GAA nMOS - Application Example

Demonstrates the usage of GTS tools to setup a GAA nMOS (particulary nanowire and nanosheet structures) calculating the sub-band structure and charge density for different orientations and stresses.
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Icon: TutorialTutorials provide step-by-step instructions on how to use GTS Framework in general or for specific appliations. To begin, we highly recommend going through the Getting Started tutorial – it shows how to get simulations running quickly and easily.

Icon: Application exampleApplication examples show the insights gained from using GTS Framework for a specific application. Next to the tutorials, these examples can be very handy to get familiar with GTS Framework, too, when used as templates. However, focus is more on the results rather than on specific UI interactions.

GTS project folderFor each tutorial and application example, GTS provides the full raw data (input files and simulation results) as a zipped GTS project file. Download the zip file, extract it to your local projects folder, and open it in GTS Framework. See the Getting Started tutorial for details.

Graduation caps indicating the sophistication level of the examples and tutorialsThe graduation caps indicate the sophistication level: 1 cap – introductory; 2 – intermediate; 3 – advanced.

Click the rows for details about each item.
Or click the icons at the right to skip the details and directly download the respective file.