In this example, a PEX of SRAM cells in FinFET technology is conducted to obtain the full SPICE netlist. Together with the corresponding transistor model cards, this netlist is used for accurate and fast simulation of SRAM KPIs including variability (RDD, MGG, and geometrical).
Project Name: DTCO_FinFET_N7_Spice_SRAM_RelVar
PDF revision of 18 June 2026
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