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Band-Edge Stress – Application Example

This example demonstrates the effect of stress on band-edge and as a result, changes in C-V curves.

Project Name: BandEdgeStress

PDF revision of 18 June 2026

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{“@id”:”/api/v1/downloads/3143″,”@type”:”Download”,”id”:3143,”title”:”Band-Edge Stress – Application Example”,”filename”:”BandEdgeStress”,”abstract”:”This example demonstrates the effect of stress on band-edge and as a result, changes in C-V curves. “,”level”:1,”doi”:null,”status”:”published”,”remarks”:null,”files”:[{“@type”:”File”,”id”:29765,”name”:”BandEdgeStress.png”,”bytes”:11757},{“@type”:”File”,”id”:29766,”name”:”BandEdgeStress.pdf”,”bytes”:233146},{“@type”:”File”,”id”:29767,”name”:”BandEdgeStress.zip”,”bytes”:766482}],”tags”:[{“@id”:”/api/v1/download_tags/23″,”@type”:”DownloadTag”,”id”:23,”name”:”example”},{“@id”:”/api/v1/download_tags/44″,”@type”:”DownloadTag”,”id”:44,”name”:”vsp”},{“@id”:”/api/v1/download_tags/70″,”@type”:”DownloadTag”,”id”:70,”name”:”si pathfinding”},{“@id”:”/api/v1/download_tags/110″,”@type”:”DownloadTag”,”id”:110,”name”:”TutExaCat-Appl.: Advanced CMOS Logic”},{“@id”:”/api/v1/download_tags/113″,”@type”:”DownloadTag”,”id”:113,”name”:”TutExaCat-Tool: GTS VSP”},{“@id”:”/api/v1/download_tags/120″,”@type”:”DownloadTag”,”id”:120,”name”:”TutExaCat-Area: Premium TCAD”},{“@id”:”/api/v1/download_tags/122″,”@type”:”DownloadTag”,”id”:122,”name”:”TutExaCat-Tool: GTS MinimosNT”},{“@id”:”/api/v1/download_tags/187″,”@type”:”DownloadTag”,”id”:187,”name”:”release-gts-2026-03″}],”date”:”2026-06-18T00:00:00+02:00″,”authors”:null}

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