On-Current Degradation in Ultra-Scaled Nanosheet FETs with S/D Underlap Doping

L.-C. Hung, Z. Stanojević, F. Schanovsky, H. Kosina, and M. Karner
Aggressive gate pitch scaling makes it increasingly challenging to control the doping gradient at the source/drain (S/D) extensions. To address this, S/D underlap doping has been proposed as a solution. However, anomalous ID,lin saturation has been experimentally observed in such devices, raising questions about its physical origin. In this work, we investigate the transport physics in ultra-scaled nanosheet FETs by solving the Subband Boltzmann Transport Equation. The simulation results reveal that secondary barriers formed in underdoped S/D extensions enhance quasi-ballistic transport even in the linear regime, providing a consistent explanation for the observed ID,lin saturation in underlap devices. These insights offer guidance for optimizing S/D underlap doping profiles, highlighting the need to avoid excessive Gate-S/D overlap capacitance while preventing on-current degradation.
Publication date: 09 December 2025
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