Impact of Defect‐Induced Strain on Device Properties

{“@id”:”/api/v1/downloads/3361″,”@type”:”Download”,”id”:3361,”title”:”Impact of Defect‐Induced Strain on Device Properties”,”filename”:”AEM-2016_Impact-of-Defect-Induced-Strain-on-Device-Properties”,”abstract”:”A significant increase of the drain current appears if defined arrangements of dislocations are present in the channel of MOSFETs. Furthermore, analyses of the electronic properties of individual defects refer to a supermetallic behavior of dislocations. The reason is the extremely high strain in the dislocation core exceeding values of ϵ ≅ 0.1. Such high strain causes substantial changes of the band structure and means that dislocations represent quantum wires. Quantum mechanical device simulations based on this conclusion demonstrated the transport of carriers on dislocations. The effect of gate voltage and strain in the dislocation core was analyzed in detail.”,”level”:null,”doi”:”10.1002/adem.201600736″,”status”:”published”,”remarks”:null,”files”:[{“@type”:”File”,”id”:29647,”name”:”AEM-2016_Impact-of-Defect-Induced-Strain-on-Device-Properties.nofile”,”bytes”:0}],”tags”:[{“@id”:”/api/v1/download_tags/20″,”@type”:”DownloadTag”,”id”:20,”name”:”publication”}],”date”:”2016-12-30T00:00:00+01:00″,”authors”:”M. Reiche, M. Kittler, E. Pippel, H. Uebensee, H. Kosina, A. Grill, Z. Stanojević, and O. Baumgartner”}