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view on Granada - ancient arabic fortress of Alhambra, Granada, Spain

GTS @SISPAD2022: CSFET, PCM/PRAM OTS

SISPAD 2022 in Granada: DoS Engineering of Cold-Source FET (CSFET) and Monolithic TCAD Simulation of Phase-Change (PCM/PRAM) + Ovonic Threshold Switch (OTS) Selector Device

GTS @SISPAD 2019 in Udine: VNAND SONOS

At the 2019 SISPAD in Udine, we invite you to hear D. Verreck’s talk “3D TCAD Model for Poly-Si Channel Current and Variability in Vertical NAND Flash Memory”, co-autored by GTS scientists.

On the feasibility of DoS-engineering for achieving sub-60 mV subthreshold slope in MOSFETs

We present the operating principle of an ideal Cold Source Field Effect Transistor and check the DoS source engineering impact on its subthreshold slope. The Subband Boltzmann Transport Equation is solved and the resulting transfer curves in the ballistic regime are presented, as well as those including the effects of scattering. The inclusion of scattering reveals its importance in the rethermalization of the cold carriers at the source extension and the degradation in the static leakage of the device. Finally, we show the impact in the SS when substituting the semiconducting source extension by the cold metal.

2 MB

Monolithic TCAD Simulation of Phase-Change Memory (PCM/PRAM) + Ovonic Threshold Switch (OTS) Selector Device

Owing to the increasing interest in the commercialization of phase-change memory (PCM) devices, a number of TCAD models have been developed for their simulation. These models formulate the melting, amorphization and crystallization of phase-change materials as well as their extreme conductivity dependence on both electric field and temperature into a set of self-consistently-solved thermoelectric and phase-field partial-differential equations. However, demonstrations of the ability of such models to match actual experimental results are rare. In addition, such PCM devices also require a so-called selector device - such as an Ovonic Threshold Switching (OTS) device - in series for proper memory operation. However, monolithic simulation of both the PCM and OTS selector device in a single simulation is largely absent from the literature, despite its potential value for material- and design-space explorations. It is the goal of this work to first characterize a PCM device in isolation against experimental data, then to demonstrate the qualitative behavior of a simulated OTS device in isolation and finally to perform a single monolithic simulation of the PCM + OTS device within the confines of a commercially available TCAD solver: GTS Framework.

1 MB

Variability-Aware DTCO Flow: Projections to N3 FinFET and Nanosheet 6T SRAM

Variability increases with downscaling, making it a vital component in the assessment of upcoming technologies. We use a variability-aware DTCO flow, which seamlessly integrates accurate TCAD simulations with industry-proven SPICE solutions. The impact of local variability sources on SRAM KPIs is analyzed for N3 FinFET and nanosheet technologies. Assuming typical process parameters, the geometrical variations due to LWR, STI recess, and epitaxial growth significantly affect the SRAM variability. However, the main contributor to variability for N3 technologies is MGG, highlighting the crucial role of metal grains size reduction for technology optimization.

1 MB

Towards Physics-Based DTCO for Performance of Advanced Technology Nodes

We present a case study which shows the path towards design-technology co-optimization (DTCO) based on physical device modeling as opposed to simulation based on empirical mobility models. This allows for more accurate and robust predictions of device performance, and allows to assess novel process options found in 7 nm and 5 nm technology nodes. A more than ten-fold increase in computational efficiency brings turn-around times down sufficiently to make physical models suitable for the DTCO process.

1 MB

Layout-Based TCAD Device Model Generation

In this work, a fully automated process emulation is presented. Starting from industrial standard gdsII mask files a user friendly and fast way to create TCAD ready models has been realized. A three step approach is used. The creation of virtual layers to allow for logical operation based on masks is shown. Then the geometrical and dopant profile instantiation is carried out. Third the mesh generation based on and optimized on the information of the first two steps is shown. Industry-relevant sample applications for the implemented work-flow ranging from a radiation hardened latch to a state of the art FinFET SRAM cell are demonstrated.

1 MB

Hierarchical TCAD Device Simulation of FinFETs

A framework for FinFET design studies is presented. Our physics-based modeling approach allows to accurately capture the effects of channel cross-section, orientation and strain as well as contact resistance - for the first time all in one tool. Using this approach as a reference, the predictiveness of empirical TCAD models is extended by re-calibration. Our hierarchical tool chain is embedded in an industry-proven framework equipped with DOE and optimization modules. The capabilities are demonstrated in a simulation study on a recent FinFET technology node.

1 MB

IEDM 2021 DTCO flow (background: aerial view of the Bay Bridge in San Francisco)

GTS @IEDM2021 – 3D NAND, AI, DTCO

DTCO Flows that Work: Why physics-based device simulation in fact is a prerequisite for getting dependable and accurate predictions for upcoming technology nodes.

Performance and Leakage Analysis of Si and Ge NWFETs Using a Combined Subband BTE and WKB Approach

We are the first to present a subband-BTE solver with a fully integrated source/drain-tunneling current calculation based on the WKB-approximation. The method is validated against ballistic NEGF calculations showing good agreement. An investigation of Si and Ge-based NWFETs is performed showing that intra-band source/drain-tunneling is not a concern for Si devices. For Ge-based PMOS devices however, tunneling leakage limits sensible LG -scaling to around 20 nm.

< 1 MB

A Versatile Finite Volume Simulator for the Analysis of Electronic Properties of Nanostructures

We present a novel semantic approach to modeling and simulation of nanoelectronic devices. The approach is based on a finite volume spatial discretization scheme. The scheme was adapted to accurately treat material anisotropy. It is thus capable of capturing orientation and strain effects both of which are prominent in the nanoscale regime. We also demonstrate the method’s simplicity and power with a three-dimensional simulation study of a quantum dot using a six band k · p Hamiltonian for holes as model.

1 MB

Phase-Space Solution of the Subband Boltzmann Transport Equation for Nano-Scale TCAD

We present a comprehensive simulation framework for transport modeling in nano-scaled devices based on the solution of the subband Boltzmann transport equation (BTE). The BTE is solved in phase space using a k·p-based electronic structure model and includes all relevant scattering processes. The BTE solver is combined with a conventional drift-diffusion- based simulator using a novel iteration approach. The pairing between BTE, DD, and Poisson results in a flexible toolkit which converges quickly in any mode of operation, allows large- scale parallelization, and to include near-equilibrium transport outside the BTE region, i.e. the contacting regions. The toolkit is commercially available as part of the GTS Nano Device Simulator (NDS). We examine realistic NMOS and PMOS devices, includ- ing transport at the microscopic scale and possible numerical approximations.

< 1 MB

Modeling Direct Band-to-Band Tunneling using QTBM

This work focuses on modeling the tunneling mechanism in direct semiconductors. An effective barrier is extracted between the valence and conduction band, by defining the barrier as valence-like near the valence band and conduction band-like near the conduction band. The transition occurs at a point obtained by momentum matching. Computation of transition coefficient is performed using the quantum transmitting boundary method.

< 1 MB

Surface-Roughness-Scattering in Non-Planar Channels – the Role of Band Anisotropy

We developed a new generic method for evaluating the surface-roughness-induced scattering rate in non-planar semiconductor structures. The method accurately captures band anisotropy and the roughness-induced momentum transfer between the confined states. Strong dependence of SRS-limited electron mobility on crystal orientation was observed with and [110]/(11̄0) being the optimal orientations.

2 MB

Investigation of Quantum Transport in Nanoscaled GaN High Electron Mobility Transistors

In this paper, a comprehensive investigation of quantum transport in nanoscaled gallium nitride (GaN) high electron mobility transistors (HEMTs) is presented. A simulation model for quantum transport in nanodevices on unstructured grids in arbitrary dimension and for arbitrary crystal directions has been developed. The model has been implemented as part of the Vienna-Schrödinger-Poisson simulation and modeling framework. The transport formalism is based on the quantum transmitting boundary method. A new approach to reduce its computational effort has been realized. The model has been used to achieve a consistent treatment of quantization and transport effects in deeply scaled asymmetric GaN HEMTs. The self-consistent electron concentration, conduction band edges and ballistic current have been calculated. The effects of strain relaxation at the heterostructure interfaces on the potential andrncarrier concentration have been shown.

< 1 MB

On the Validity of Momentum Relaxation Time in Low-Dimensional Carrier Gases

The momentum relaxation time (MRT) is widely used to simplify low-field mobility calculations including anisotropic scattering processes. Although not always fully justified, it has been very practical in simulating transport in bulk and in direction quantity low-dimensional carrier gases alike. We review the assumptions behind the MRT, quantify the error introduced by its usage forrnlow-dimensional carrier gases, and point out its weakness in accounting for inter-subband interaction, occurring specifically at low inversion densities.

1 MB

Expanding TCAD Simulations from Grid to Cloud

In this work, the distribution, execution and performance of TCAD simulations on grid and cloud systems are investigated. A module for distributed computing which can uniformly interface both grid and cloud computing systems has been implemented within GTS Framework. Automated allocation of resources for user jobs on a combined platform has been achieved. Traditional grid-computing systems are compared with cloud-based systems. Strategies for cost-effective allocation of cloud-resources are presented. The performance of a typical TCAD application run on a grid, in the cloud, and a hybrid system combining both are assessed.

1 MB

Efficient Modeling of Source/Drain Tunneling in Ultra-Scaled Transistors

In this work, a comprehensive investigation of the effect of source/drain tunneling in ultra-scaled transistors is presented. A novel approach to efficiently and accurately incorporate the quantum-mechanical effects of source/drain (S/D) tunneling in semi-classical device simulators has been developed. The ballistic quantum transport model has been implemented as part of the Vienna-Schrödinger-Poisson simulation and modeling framework. The transport formalism is based on the quantum transmitting boundary method and has been extended to provide recombination and generation rates of carriers due to the direct tunneling current across the source/drain barrier. The model has been used to investigate the effect of direct S/D tunneling on device performance in ultra-scaled double-gate and nanowire transistors. The variations in transfer and output characteristics due to the tunneling effect have been calculated for different gate lengths and channel widths. The influence on the drain induced barrier lowering is shown.

1 MB