Despite its validity being questioned for decades, classical drift-diffusion-based device TCAD keeps being pushed uphill, using ever more complicated empirical models. Such models may have hundreds of fitting-parameters with very limited portability, which are difficult to fit to experiments. Universal mobility behavior [Takagi1994] is a key ingredient in empirical models. However, universality appears to be lost in fully-depleted channels such as thin SOI films, FinFETs, or gate-all-around structures [Pereira2015].

While maintaining a practical and efficient approach, **we extend and enhance device simulation with physical modeling**, as illustrated in Fig. 2; the physical models included in GTS Nano-Device Simulator **cover the most important physical aspects of device operation**: ballistic transport, carrier scattering, and tunneling/leakage phenomena.

### Coupling Classical and Quantum-Mechanical Simulator

Within the GTS Nano-Device Simulator suite, the classical device simulator Minimos-NT interoperates with the Vienna Schrödinger-Poisson (VSP) simulator. VSP contains open and closed-boundary Schrödinger solvers, a k·p-based subband calculator, a low-field mobility calculator, and a high-field Boltzmann transport solver, along with several scattering models, and provides data to replace Minimos-NT's built-in empirical density and mobility models. Fig. 3 shows the coupling for **semi-classical** (a, over-the barrier) and **tunneling** (b, under-the-barrier) **transport**.

### Further Innovations in TCAD

In the course of the IEDM paper, we contributed several innovations to the state-of-the-art of semiconductor device simulation (with implementations, to our knowledge, being the first of their kind):

- spin-orbit correction for valence bands
- automated channel slicing
- tunneling current to generation rate conversion
- phase-space based solution of the Boltzmann transport equation
- band-to-band tunneling via quantum transport on unstructured meshes.

Below, we explain the methodology by presenting two case studies, one focused on InGaAs-based n-type MISFETs for logic applications [Radosavljevic2010], the other focused on p-type high-Ge-content (HGC) gate-all-around channels [Hashemic2015].

## Under The Barrier:

Off-State Leakage, Direct & BtB Tunneling

### InGaAs MISFET

The gate stack of the examined InGaAs-MISFET (DGMOS, 7 nm width, 10 nm gate length) is made of an InAlAs substrate, a 10 nm InGaAs channel layer, a 2 nm InP etch-stop, a TaSiOx dielectric, and a metal gate. After calibrating gate work function and dielectric using C/V-measurements [Radosavljevic2010], the channel conductivity is immediately found to agree with the measured curve [Stanojević2010]. The basic simulation setup includes non-parabolic band-structure and mobility calculation on slices. Since III/V-channels are expected to suffer from leakage phenomena, direct source-drain-tunneling and band-to-band tunneling are added to the simulation flow (Fig. 3). The tunneling current is converted into effective generation/recombination rates to be fed back to the device simulator. The impact of tunneling on the off-current is dominated by band-to-band tunneling (BTBT).

The actual quantum transport model in VSP employs an effective barrier for band-to-band tunneling, as shown in Fig. 4: For each energy in the tunneling window, the valence band edge is flipped upwards to the switching point into the conduction band to obtain the effective barrier potential (red curve).

Fig. 5 depicts a sketch of the rate calculation procedure for source drain tunneling.

Fig. 6 shows the contributions of direct source/drain tunneling leakage and band-to-band tunneling to the total off-current.

Fig. 7 shows the band-to-band tunneling rates in the InGaAs DGMOS structure; again we observe a distinct spatial separation between electron and hole generation. The generation spots have bent shapes due to the contours of the electrostatic potential.

According to the Source/Drain direct tunneling rates in Fig. 8, both electron generation and recombination occur in the same device. The rates appear at the sides where current flows under the barrier, but not in the channel center where the leakage current is thermionic.

## Over The Barrier:

Drive Current, Subband-BTE

### High Germanium-Content SiGe Gate All-Around PMOS (HGC GAA MOSFET)

The simulation of the HGC-Si_{0.25}Ge_{0.75}-GAA-FET according to Fig. 9 also employs a sliced setup; each slice runs a three-band k·p model with spin-orbit correction (Fig. 10), where the composition-dependent k·p band-parameters for Si_{1-x}Ge_{x} are obtained from a non-linear interpolation scheme based on (8). This is combined with a full-band scattering rate calculation [Stanojević2014], including acoustic and optical phonons, surface roughness [Stanojević2015], impurities, and alloy disorder.

The k-spaces of each slice are combined to form a phase- space (i.e. position-momentum-space) where the distribution function is solved. Such a phase-space distribution function is shown in Fig. 11, where the effect of carrier scattering is clearly visible when comparing the ballistic and dissipative solutions. The corresponding hole velocity is shown in Fig. 12.

Fig. 13 shows transfer characteristics of the HGC GAA PMOS for 5nm, 7.5nm and 10nm diameter.

The nature of alloy-scattering in Si_{1-x}Ge_{x} has been subject to debate in the past [Jeong2013]. Here, we use a DFT-based approach to evaluate the effective scattering potential, leveraging the capabilities of the MedeA software environment [MaterialsDesign2015] with its integrated VASP ([Blöchl1994], [Kresse1996], [Kresse1993], [Kresse1999]) simulator. An ensemble of random super-cells of Si_{0.25}Ge_{0.75} is generated. Full structure relaxation is performed using DFT-GGA theory [Perdev1996], which accounts for distortions due to different bond lengths between Si/Si, Ge/Ge, and Si/Ge. Subsequently, the electronic structure is obtained from the super-cells using the modified Becke-Johnson meta-GGA functional [Tran2009], which is far more accurate than GGA but much faster than hybrid functionals. Self-consistent DFT calculation ensures that screening is accounted for. A statistical analysis over the ensemble of super-cells reveals a disorder-induced band-edge variation of 25 meV.

## Predictive Simulation, High Portability

GTS Nano-Device Simulator captures all aspects of contemporary and future device operation. The approach is predictive and portable with much fewer model parameters than empirical models, making both fitting to measurement and input from ab-initio tools well manageable.