Classical Semiconductor Device and Circuit Simulator

Screenshot: Vertically stacked nw fet

Icon: GTS Minimos-NT

GTS Minimos-NT is a general-purpose 2D and 3D semiconductor device simulator providing steady-state, transient, and small-signal analysis of arbitrary two and three dimensional device geometries. In mixed-mode, numerical device simulations can be embedded in circuit simulation with circuits consisting of 2D/3D TCAD devices, compact device models, and passive elements.

GTS Minimos-NT integrates a comprehensive set of physical models for simulation of various kinds of advanced device structures, such as contemporary planar and vertical CMOS devices, silicon-on-insulator (SOI) devices, and hetero-structure devices. Taking into account atomistic traps and dopants, GTS Minimos-NT provides reliability and variability modeling of highly scaled transistors, having a channel length down to nanometer scale. Different materials are treated in an abstract way since all material properties are handled via a database which under control of the model server.

GTS Minimos-NT employs the powerful input-deck language, enabling the user to customize the simulation in many details. The basic idea is that the input-deck is not evaluated once at the beginning of the simulation, but is treated like a database which can be accessed at run-time. Since each keyword in this input-deck can be an arbitrarily complex and time dependent expression, fine-tuning can be done without the need of any predefined heuristic algorithms, e.g., controlling the stepping delta or increasing the matrix pre-conditioner fill-in depending on bias or for time steps with large curvature of the input signals.

Features

Basic Features

  • Drift-diffusion transport models
  • Hydrodynamic (energy) transport model
  • Two- and three-dimensional device structures
  • Simulation modes: DC, AC, transient; mixed-mode
  • Self-heating simulation with lattice heat flow equation

Environment

  • Integration with GTS Framework
  • Graphical user interface
  • Sophisticated input-deck database
  • Multi-core simulation support
  • Material database extendable via C++ like script language
  • Unstructured and structured meshes in two and three dimensions

Physical Models

  • Multitude of mobility models
  • Band gap narrowing
  • Band-to-band tunneling
  • Trap assisted band-to-band tunneling
  • Impact ionization
  • Quantum correction models
  • Density-gradient model
  • Mobility degradation models
  • Hot-carrier degradation
  • BTI models
  • Optical generation model
  • Irradiation models
  • Heterostructure interfaces handled with thermionic emission model or a thermionic field emission model
  • Tunneling models for gate leakage simulations

Specific Simulations and Materials

  • Support for EEPROM simulation: floating gates and oxide traps
  • Ferroelectric polarization field in transient simulations
  • Parasitics extraction: resistances and capacitances
  • Direct extraction of S and Y matrices
  • Models for Silicon Carbide (SiC) devices
  • Extensive and extendable material database
  • Abstract materials handling via a material database. Models available for Si, Ge, SiGe, SiC, SiN, GaAs, AlAs, InAs, InP, GaP, GaN, AlGaAs, InGaAs, InAlAs, InAsP, GaAsP, InGaP, SiO2, Si3N4, AlN, Al2O3, and BeO.
  • Circuit analysis with an additional thermal circuit
  • BSIM4 compact model

Variability and Reliability

  • Statistical reliability analysis
  • Variability analysis
  • Atomistic traps and dopants
  • Latest BTI models (NBTI, PBTI)
VNAND: Formation of percolation paths due to grain formation during processing
Statistical fluctuations in leakage due to discrete traps and dopants as well as geometrical variations of the DRAM cell transistors
Full 3D structure of 4T PPD CIS
Transient simulation of CIS readout cycle
Vertically stacked nanowire FET, random discrete dopants

Proven, Consistent, Comprehensive

A comprehensive set of physically-based models allows for simulating various kinds of advanced device structures, such as contemporary vertical and planar CMOS devices, silicon-on-insulator (SOI) devices, and hetero-structure devices made of all currently used semiconductor materials. Taking into account the atomistic nature of traps and dopants, GTS Minimos-NT provides reliability and variability modeling of highly scaled transistors, such as planar devices and silicon-on-insulator as well as FinFETs, having channel lengths in the nanometer scale. Support for mixed-mode simulations of circuits made of lumped components and numerical semiconductor devices including self-heating simulation and thermal circuit analysis make GTS Minimos-NT a powerful tool in any TCAD application or DTCO flow.

Want to learn more?

Please check the examples, tutorials, publications and further information in the Related column.
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