Building on GTS's expertise in physics-based modeling, GTS scientist and CTO Z. Stanojević presents a new and efficient way of simulating novel III/V-based non-planar transistor architectures. The solution built into GTS Framework is based on physical modeling of electronic structure, scattering, and transport. The combination with GTS's 3D device simulator Minimos-NT allows to leverage the benefits of physical modeling for the simulation of entire devices.
By example of an InGaAs channel, transconductance curve, electron mobility and transfer characteristic are calculated, including sub-threshold slope and DIBL. The electronic structure is modeled using an anisotropic effective mass Hamiltonian with non-parabolic correction. Transport is modeled on top of the subband structure using the linearized Boltzmann-transport-equation (LBTE). The most important scattering mechanism in III/V materials is polar-optical phonon scattering; the Fröhlich-Hamiltonian is extended by treating the electrostatic Green's function numerically.
The 18th International Workshop on Computational Electronics (IWCE 2015) takes place in West Lafayette, Indiana, USA, September 2-4, 2015.
For details on IWCE 2015 and the program, please visit the IWCE web site.