Global TCAD Solutions

Cutting-Edge TCAD
11.04.2017

GTS @ 12th ESA Geant4 Space Users Workshop

GTS presenting TCAD modeling toolchain for irradition effects in nano-scale CMOS logic devices using layout-based design


6T FinFET SRAM, rate generation profile

At the 12th Geant4 Space Users Workshop at European Space Agency (ESA), GTS scientist Oskar Baumgartner is presenting a consistent TCAD modeling toolchain for irradiation effects on SRAM and logic cells containing FinFET and nanowire transistors.

Irradiation Effects in N14, N7 and below CMOS Logic Devices

Modern electronic systems can be disrupted or damaged by high energy particles. Radiation effects have become a critical reliability issue in nanometer-scaled logic devices, particularly for aviation applications or space environments, and now increasingly for safety-critical ground-level applications such as transportation and medicine. In the industrial development process of such devices the radiation tolerance is studied at particle accelerator facilities or gamma-ray sources. However, this method is time consuming and very expensive, and the availability of such facilities is limited. If the degradation of device performance due to irradiation can be simulated by software, the test time and cost of investment for device development will be greatly reduced. Furthermore, with the advancement of semiconductor technology, the characteristic dimension of devices such as modern SRAMs and logic cells have already reached the nanometer-scale. The potential radiation effects and tolerances for devices at the nanometer scale are inherently different from devices at the micrometer scale.

Toolchain for SRAM and Logic Cells with FinFETs and Nanowires

Layout-Based Design, Device, Circuit, High-Energy Particles

We present a consistent TCAD modeling toolchain for upcoming semiconductor technology nodes that incorporates a high-energy particle simulator and a sophisticated device and mixed-mode circuit simulator. Layout-based design and technology rule files provide a quick setup of the sub-N7 devices under test. Our toolchain enables the calculation of radiation effects on SRAM and logic cells containing state-of-the-art FinFET and nanowire transistors.

For more, please see the 12th Geant4 Space Users Workshop website.

Acknowledgement: MORAFLASH

This work is supported by the Austrian-Chinese transnational project MORAFLASH No 850660.

Thanks to IuE, TU Wien, Kallisto Consultancy Limited, Chinese Academy of Science (CAS), Österreichische Forschungsförderungsgesellschaft (FFG).


Files:
GTS_G4SUW2017.pdf3.1 M