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Events and Latest Developments at GTS
Please find below the newest and past releases of or our corporate news.
We would love to inform you about relevant events and developments at GTS,
and welcome you to subscribe to our RSS newsfeed.
(We keep distortion to a minimum, not releasing more than ca. 12 items per year.)
18.09.2019
ESSDERC: Chairing session "Multi-physics Modeling"
Meet GTS CTO Zlatan Stanojević in Krakòw
04.09.2019
GTS @SISPAD 2019 in Udine: VNAND SONOS Variability
3D TCAD Model for Poly-Si Channel Current and Variability in Vertical NAND Flash Memory (D. Verreck, co-authored by GTS)
29.05.2019
Visit us at DAC 2019!
From June 2nd to 6th we will be at the Design Automation Conference 2019 in Las Vegas Convention Center.Visit our us at booth 1118 (next to the Coffee Area) - and /or come to poster session 125.19 where we will present the...
18.02.2019
GTS is proud to hire the lead developer of compact physics software Comphy
GTS scientific team enhanced by oxide reliability modeling specialist
17.01.2019
New Christian Doppler Lab on “single defect spectroscopy in semiconductor devices”
In the new CD Laboratory at the TU Wien, Infineon Technologies AG, ams AG and Global TCAD Solutions GmbH are working together on understanding the physics of gate oxide reliability in semiconductor devices.
17.12.2018
GTS@IEEE-ICEE in Bangalore – invited talk by Zlatan Stanojević
Zlatan Stanojević, CTO of Global TCAD Solutions, will hold a talk on "Innovation in TCAD from a Start-Up Perspective" in the Modelling and Simulation session, at 15:15 on Dec. 18th, 2018.
04.12.2018
IEDM 2018, MOS-AK Workshop in San Francisco
Visit the GTS booth in the IEDM exhibits area and join our presentation at MOS-AK workshop on Dec 5
27.11.2018
GTS Framework 2018.09
New applications: TCAD in DTCO, self-heating (SH) simulation for logic cells, germanium gate-all-around architectures (GAA)
10.09.2018
TCAD in DTCO: Cell Designer - GTS Paper @ ESSDERC 2018
GTS presenting first practical TCAD-based work flow for design-technology co-optimization (DTCO) of standard cells.
17.06.2018
NC-FET, FeRAM: GTS @ VLSI and NCFET Research Grant
Next to its contribution at VLSI/SNW 2018, GTS takes part in a FFG research project to create a 3D TCAD model for ferroelectric materials.
10.04.2018
V-NAND application example: Channel trans-conductance
Modeling and simulation of V-NAND poly-silicon channel trans-conductance, including variability
19.03.2018
GTS @ EuroSOI-ULIS 2018: Scaling limits of FD-SOI
Presenting a Physical Modeling Study Based on 3D Phase-Space Subband Boltzmann Transport for Fully-Depleted SOI Technology
15.03.2018
GTS Framework 2018.03
New applications: V-NAND transconductance variability, physical simulation of FD-SOI technology
22.11.2017
GTS @ IEDM 2017: Cell Simulation, DTCO
Visit the GTS booth in the IEDM exhibits area to learn about our latest products and developments!
07.10.2017
Listed by European Commission Innovation Radar 2017
GTS was identified as one of the top 10 "Best Young SME" by the European Commission Innovation Radar 2017.
13.07.2017
IEEE EDS Delhi Workshop, AICTE / IIT(BHU) Varanasi
GTS workshops at two events in India, coordinated by our partner TNL.
20.06.2017
New GTS Partner in India
TechNextLab becoming GTS partner for distribution and support in India.
31.05.2017
IWRMN-EDHE 2017 Invited Talk: From Impact to Upset
Physical Modeling of Irradiation Effects in nano-scaled CMOS Logic and Memory Devices
19.04.2017
Join our event at VLSI-TSA: DTCO for Advanced Nodes
Towards Physics-based DTCO for N7 and sub-N7 Technologies
